The invention relates to the creation of a post-IML (initial microcode load) environment.
During the early “bring-up” of any server, any inherent design instabilities are compounded by time to market pressures, and fabrication difficulties. Integrating all of the components (hardware, microcode, and firmware) earlier, e.g. during “pre-bringup” would allow the “bringup” in the laboratory to progress faster. As used herein “bringup” is the initial testing of code and hardware, for example, prototype hardware and code.
The problem is that it is very difficult to get a Post IML state with all of the chip models and code. Hardware simulation accelerators could be used to execute IML and then pre-verify the functions. But this would take 160 hours minimum to just run IML on a hyper accelerator. As used herein “IML”, that is “Initial Microcode Load” is a process used in servers, such as IBM zSeries servers, to initialize the hardware, load the firmware, and enable the server for customer use. Also solutions available are to unit test these code paths, however when unit simulation pieces are brought together for the first time in the laboratory, progress is hampered by relatively simple interface problems. This is due to specification anomalies, miscommunication, etc.
These problems illustrate the need for a Post IML Co-Simulation environment that encompasses all of the central electronic core (“CEC”) code and hardware models necessary to run a small server, for example, an IBM zSeries eServer.